379 lines
15 KiB
C
379 lines
15 KiB
C
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// Copyright (c) 2012 The Chromium Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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// This file is an internal atomic implementation for compiler-based
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// ThreadSanitizer. Use base/atomicops.h instead.
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#ifndef BASE_ATOMICOPS_INTERNALS_TSAN_H_
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#define BASE_ATOMICOPS_INTERNALS_TSAN_H_
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#include "base/base_export.h"
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// This struct is not part of the public API of this module; clients may not
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// use it. (However, it's exported via BASE_EXPORT because clients implicitly
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// do use it at link time by inlining these functions.)
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// Features of this x86. Values may not be correct before main() is run,
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// but are set conservatively.
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struct AtomicOps_x86CPUFeatureStruct {
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bool has_amd_lock_mb_bug; // Processor has AMD memory-barrier bug; do lfence
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// after acquire compare-and-swap.
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bool has_sse2; // Processor has SSE2.
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};
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BASE_EXPORT extern struct AtomicOps_x86CPUFeatureStruct
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AtomicOps_Internalx86CPUFeatures;
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#define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory")
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namespace base {
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namespace subtle {
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#ifndef TSAN_INTERFACE_ATOMIC_H
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#define TSAN_INTERFACE_ATOMIC_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef char __tsan_atomic8;
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typedef short __tsan_atomic16; // NOLINT
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typedef int __tsan_atomic32;
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typedef long __tsan_atomic64; // NOLINT
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#if defined(__SIZEOF_INT128__) \
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|| (__clang_major__ * 100 + __clang_minor__ >= 302)
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typedef __int128 __tsan_atomic128;
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#define __TSAN_HAS_INT128 1
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#else
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typedef char __tsan_atomic128;
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#define __TSAN_HAS_INT128 0
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#endif
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typedef enum {
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__tsan_memory_order_relaxed,
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__tsan_memory_order_consume,
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__tsan_memory_order_acquire,
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__tsan_memory_order_release,
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__tsan_memory_order_acq_rel,
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__tsan_memory_order_seq_cst,
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} __tsan_memory_order;
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__tsan_atomic8 __tsan_atomic8_load(const volatile __tsan_atomic8 *a,
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__tsan_memory_order mo);
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__tsan_atomic16 __tsan_atomic16_load(const volatile __tsan_atomic16 *a,
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__tsan_memory_order mo);
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__tsan_atomic32 __tsan_atomic32_load(const volatile __tsan_atomic32 *a,
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__tsan_memory_order mo);
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__tsan_atomic64 __tsan_atomic64_load(const volatile __tsan_atomic64 *a,
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__tsan_memory_order mo);
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__tsan_atomic128 __tsan_atomic128_load(const volatile __tsan_atomic128 *a,
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__tsan_memory_order mo);
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void __tsan_atomic8_store(volatile __tsan_atomic8 *a, __tsan_atomic8 v,
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__tsan_memory_order mo);
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void __tsan_atomic16_store(volatile __tsan_atomic16 *a, __tsan_atomic16 v,
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__tsan_memory_order mo);
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void __tsan_atomic32_store(volatile __tsan_atomic32 *a, __tsan_atomic32 v,
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__tsan_memory_order mo);
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void __tsan_atomic64_store(volatile __tsan_atomic64 *a, __tsan_atomic64 v,
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__tsan_memory_order mo);
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void __tsan_atomic128_store(volatile __tsan_atomic128 *a, __tsan_atomic128 v,
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__tsan_memory_order mo);
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__tsan_atomic8 __tsan_atomic8_exchange(volatile __tsan_atomic8 *a,
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__tsan_atomic8 v, __tsan_memory_order mo);
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__tsan_atomic16 __tsan_atomic16_exchange(volatile __tsan_atomic16 *a,
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__tsan_atomic16 v, __tsan_memory_order mo);
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__tsan_atomic32 __tsan_atomic32_exchange(volatile __tsan_atomic32 *a,
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__tsan_atomic32 v, __tsan_memory_order mo);
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__tsan_atomic64 __tsan_atomic64_exchange(volatile __tsan_atomic64 *a,
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__tsan_atomic64 v, __tsan_memory_order mo);
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__tsan_atomic128 __tsan_atomic128_exchange(volatile __tsan_atomic128 *a,
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__tsan_atomic128 v, __tsan_memory_order mo);
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__tsan_atomic8 __tsan_atomic8_fetch_add(volatile __tsan_atomic8 *a,
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__tsan_atomic8 v, __tsan_memory_order mo);
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__tsan_atomic16 __tsan_atomic16_fetch_add(volatile __tsan_atomic16 *a,
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__tsan_atomic16 v, __tsan_memory_order mo);
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__tsan_atomic32 __tsan_atomic32_fetch_add(volatile __tsan_atomic32 *a,
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__tsan_atomic32 v, __tsan_memory_order mo);
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__tsan_atomic64 __tsan_atomic64_fetch_add(volatile __tsan_atomic64 *a,
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__tsan_atomic64 v, __tsan_memory_order mo);
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__tsan_atomic128 __tsan_atomic128_fetch_add(volatile __tsan_atomic128 *a,
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__tsan_atomic128 v, __tsan_memory_order mo);
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__tsan_atomic8 __tsan_atomic8_fetch_and(volatile __tsan_atomic8 *a,
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__tsan_atomic8 v, __tsan_memory_order mo);
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__tsan_atomic16 __tsan_atomic16_fetch_and(volatile __tsan_atomic16 *a,
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__tsan_atomic16 v, __tsan_memory_order mo);
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__tsan_atomic32 __tsan_atomic32_fetch_and(volatile __tsan_atomic32 *a,
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__tsan_atomic32 v, __tsan_memory_order mo);
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__tsan_atomic64 __tsan_atomic64_fetch_and(volatile __tsan_atomic64 *a,
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__tsan_atomic64 v, __tsan_memory_order mo);
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__tsan_atomic128 __tsan_atomic128_fetch_and(volatile __tsan_atomic128 *a,
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__tsan_atomic128 v, __tsan_memory_order mo);
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__tsan_atomic8 __tsan_atomic8_fetch_or(volatile __tsan_atomic8 *a,
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__tsan_atomic8 v, __tsan_memory_order mo);
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__tsan_atomic16 __tsan_atomic16_fetch_or(volatile __tsan_atomic16 *a,
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__tsan_atomic16 v, __tsan_memory_order mo);
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__tsan_atomic32 __tsan_atomic32_fetch_or(volatile __tsan_atomic32 *a,
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__tsan_atomic32 v, __tsan_memory_order mo);
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__tsan_atomic64 __tsan_atomic64_fetch_or(volatile __tsan_atomic64 *a,
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__tsan_atomic64 v, __tsan_memory_order mo);
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__tsan_atomic128 __tsan_atomic128_fetch_or(volatile __tsan_atomic128 *a,
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__tsan_atomic128 v, __tsan_memory_order mo);
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__tsan_atomic8 __tsan_atomic8_fetch_xor(volatile __tsan_atomic8 *a,
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__tsan_atomic8 v, __tsan_memory_order mo);
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__tsan_atomic16 __tsan_atomic16_fetch_xor(volatile __tsan_atomic16 *a,
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__tsan_atomic16 v, __tsan_memory_order mo);
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__tsan_atomic32 __tsan_atomic32_fetch_xor(volatile __tsan_atomic32 *a,
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__tsan_atomic32 v, __tsan_memory_order mo);
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__tsan_atomic64 __tsan_atomic64_fetch_xor(volatile __tsan_atomic64 *a,
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__tsan_atomic64 v, __tsan_memory_order mo);
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__tsan_atomic128 __tsan_atomic128_fetch_xor(volatile __tsan_atomic128 *a,
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__tsan_atomic128 v, __tsan_memory_order mo);
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__tsan_atomic8 __tsan_atomic8_fetch_nand(volatile __tsan_atomic8 *a,
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__tsan_atomic8 v, __tsan_memory_order mo);
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__tsan_atomic16 __tsan_atomic16_fetch_nand(volatile __tsan_atomic16 *a,
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__tsan_atomic16 v, __tsan_memory_order mo);
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__tsan_atomic32 __tsan_atomic32_fetch_nand(volatile __tsan_atomic32 *a,
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__tsan_atomic32 v, __tsan_memory_order mo);
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__tsan_atomic64 __tsan_atomic64_fetch_nand(volatile __tsan_atomic64 *a,
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__tsan_atomic64 v, __tsan_memory_order mo);
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__tsan_atomic128 __tsan_atomic128_fetch_nand(volatile __tsan_atomic128 *a,
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__tsan_atomic128 v, __tsan_memory_order mo);
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int __tsan_atomic8_compare_exchange_weak(volatile __tsan_atomic8 *a,
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__tsan_atomic8 *c, __tsan_atomic8 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic16_compare_exchange_weak(volatile __tsan_atomic16 *a,
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__tsan_atomic16 *c, __tsan_atomic16 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic32_compare_exchange_weak(volatile __tsan_atomic32 *a,
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__tsan_atomic32 *c, __tsan_atomic32 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic64_compare_exchange_weak(volatile __tsan_atomic64 *a,
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__tsan_atomic64 *c, __tsan_atomic64 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic128_compare_exchange_weak(volatile __tsan_atomic128 *a,
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__tsan_atomic128 *c, __tsan_atomic128 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic8_compare_exchange_strong(volatile __tsan_atomic8 *a,
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__tsan_atomic8 *c, __tsan_atomic8 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic16_compare_exchange_strong(volatile __tsan_atomic16 *a,
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__tsan_atomic16 *c, __tsan_atomic16 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic32_compare_exchange_strong(volatile __tsan_atomic32 *a,
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__tsan_atomic32 *c, __tsan_atomic32 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic64_compare_exchange_strong(volatile __tsan_atomic64 *a,
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__tsan_atomic64 *c, __tsan_atomic64 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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int __tsan_atomic128_compare_exchange_strong(volatile __tsan_atomic128 *a,
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__tsan_atomic128 *c, __tsan_atomic128 v, __tsan_memory_order mo,
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__tsan_memory_order fail_mo);
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__tsan_atomic8 __tsan_atomic8_compare_exchange_val(
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volatile __tsan_atomic8 *a, __tsan_atomic8 c, __tsan_atomic8 v,
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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__tsan_atomic16 __tsan_atomic16_compare_exchange_val(
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volatile __tsan_atomic16 *a, __tsan_atomic16 c, __tsan_atomic16 v,
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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__tsan_atomic32 __tsan_atomic32_compare_exchange_val(
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volatile __tsan_atomic32 *a, __tsan_atomic32 c, __tsan_atomic32 v,
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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__tsan_atomic64 __tsan_atomic64_compare_exchange_val(
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volatile __tsan_atomic64 *a, __tsan_atomic64 c, __tsan_atomic64 v,
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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__tsan_atomic128 __tsan_atomic128_compare_exchange_val(
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volatile __tsan_atomic128 *a, __tsan_atomic128 c, __tsan_atomic128 v,
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__tsan_memory_order mo, __tsan_memory_order fail_mo);
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void __tsan_atomic_thread_fence(__tsan_memory_order mo);
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void __tsan_atomic_signal_fence(__tsan_memory_order mo);
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // #ifndef TSAN_INTERFACE_ATOMIC_H
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inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32 *ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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Atomic32 cmp = old_value;
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__tsan_atomic32_compare_exchange_strong(ptr, &cmp, new_value,
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__tsan_memory_order_relaxed, __tsan_memory_order_relaxed);
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return cmp;
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}
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inline Atomic32 NoBarrier_AtomicExchange(volatile Atomic32 *ptr,
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Atomic32 new_value) {
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return __tsan_atomic32_exchange(ptr, new_value,
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__tsan_memory_order_relaxed);
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}
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inline Atomic32 Acquire_AtomicExchange(volatile Atomic32 *ptr,
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Atomic32 new_value) {
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return __tsan_atomic32_exchange(ptr, new_value,
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__tsan_memory_order_acquire);
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}
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inline Atomic32 Release_AtomicExchange(volatile Atomic32 *ptr,
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Atomic32 new_value) {
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return __tsan_atomic32_exchange(ptr, new_value,
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__tsan_memory_order_release);
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}
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inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32 *ptr,
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Atomic32 increment) {
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return increment + __tsan_atomic32_fetch_add(ptr, increment,
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__tsan_memory_order_relaxed);
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}
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inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32 *ptr,
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Atomic32 increment) {
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return increment + __tsan_atomic32_fetch_add(ptr, increment,
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__tsan_memory_order_acq_rel);
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}
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inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32 *ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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Atomic32 cmp = old_value;
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__tsan_atomic32_compare_exchange_strong(ptr, &cmp, new_value,
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__tsan_memory_order_acquire, __tsan_memory_order_acquire);
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return cmp;
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}
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inline Atomic32 Release_CompareAndSwap(volatile Atomic32 *ptr,
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Atomic32 old_value,
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Atomic32 new_value) {
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Atomic32 cmp = old_value;
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__tsan_atomic32_compare_exchange_strong(ptr, &cmp, new_value,
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__tsan_memory_order_release, __tsan_memory_order_relaxed);
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return cmp;
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}
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inline void NoBarrier_Store(volatile Atomic32 *ptr, Atomic32 value) {
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__tsan_atomic32_store(ptr, value, __tsan_memory_order_relaxed);
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}
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inline void Acquire_Store(volatile Atomic32 *ptr, Atomic32 value) {
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__tsan_atomic32_store(ptr, value, __tsan_memory_order_relaxed);
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__tsan_atomic_thread_fence(__tsan_memory_order_seq_cst);
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}
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inline void Release_Store(volatile Atomic32 *ptr, Atomic32 value) {
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__tsan_atomic32_store(ptr, value, __tsan_memory_order_release);
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}
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inline Atomic32 NoBarrier_Load(volatile const Atomic32 *ptr) {
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return __tsan_atomic32_load(ptr, __tsan_memory_order_relaxed);
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}
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inline Atomic32 Acquire_Load(volatile const Atomic32 *ptr) {
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return __tsan_atomic32_load(ptr, __tsan_memory_order_acquire);
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}
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inline Atomic32 Release_Load(volatile const Atomic32 *ptr) {
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__tsan_atomic_thread_fence(__tsan_memory_order_seq_cst);
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return __tsan_atomic32_load(ptr, __tsan_memory_order_relaxed);
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}
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inline Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64 *ptr,
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Atomic64 old_value,
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Atomic64 new_value) {
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Atomic64 cmp = old_value;
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__tsan_atomic64_compare_exchange_strong(ptr, &cmp, new_value,
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__tsan_memory_order_relaxed, __tsan_memory_order_relaxed);
|
||
|
|
return cmp;
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 NoBarrier_AtomicExchange(volatile Atomic64 *ptr,
|
||
|
|
Atomic64 new_value) {
|
||
|
|
return __tsan_atomic64_exchange(ptr, new_value, __tsan_memory_order_relaxed);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 Acquire_AtomicExchange(volatile Atomic64 *ptr,
|
||
|
|
Atomic64 new_value) {
|
||
|
|
return __tsan_atomic64_exchange(ptr, new_value, __tsan_memory_order_acquire);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 Release_AtomicExchange(volatile Atomic64 *ptr,
|
||
|
|
Atomic64 new_value) {
|
||
|
|
return __tsan_atomic64_exchange(ptr, new_value, __tsan_memory_order_release);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64 *ptr,
|
||
|
|
Atomic64 increment) {
|
||
|
|
return increment + __tsan_atomic64_fetch_add(ptr, increment,
|
||
|
|
__tsan_memory_order_relaxed);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 Barrier_AtomicIncrement(volatile Atomic64 *ptr,
|
||
|
|
Atomic64 increment) {
|
||
|
|
return increment + __tsan_atomic64_fetch_add(ptr, increment,
|
||
|
|
__tsan_memory_order_acq_rel);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline void NoBarrier_Store(volatile Atomic64 *ptr, Atomic64 value) {
|
||
|
|
__tsan_atomic64_store(ptr, value, __tsan_memory_order_relaxed);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline void Acquire_Store(volatile Atomic64 *ptr, Atomic64 value) {
|
||
|
|
__tsan_atomic64_store(ptr, value, __tsan_memory_order_relaxed);
|
||
|
|
__tsan_atomic_thread_fence(__tsan_memory_order_seq_cst);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline void Release_Store(volatile Atomic64 *ptr, Atomic64 value) {
|
||
|
|
__tsan_atomic64_store(ptr, value, __tsan_memory_order_release);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 NoBarrier_Load(volatile const Atomic64 *ptr) {
|
||
|
|
return __tsan_atomic64_load(ptr, __tsan_memory_order_relaxed);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 Acquire_Load(volatile const Atomic64 *ptr) {
|
||
|
|
return __tsan_atomic64_load(ptr, __tsan_memory_order_acquire);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 Release_Load(volatile const Atomic64 *ptr) {
|
||
|
|
__tsan_atomic_thread_fence(__tsan_memory_order_seq_cst);
|
||
|
|
return __tsan_atomic64_load(ptr, __tsan_memory_order_relaxed);
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 Acquire_CompareAndSwap(volatile Atomic64 *ptr,
|
||
|
|
Atomic64 old_value,
|
||
|
|
Atomic64 new_value) {
|
||
|
|
Atomic64 cmp = old_value;
|
||
|
|
__tsan_atomic64_compare_exchange_strong(ptr, &cmp, new_value,
|
||
|
|
__tsan_memory_order_acquire, __tsan_memory_order_acquire);
|
||
|
|
return cmp;
|
||
|
|
}
|
||
|
|
|
||
|
|
inline Atomic64 Release_CompareAndSwap(volatile Atomic64 *ptr,
|
||
|
|
Atomic64 old_value,
|
||
|
|
Atomic64 new_value) {
|
||
|
|
Atomic64 cmp = old_value;
|
||
|
|
__tsan_atomic64_compare_exchange_strong(ptr, &cmp, new_value,
|
||
|
|
__tsan_memory_order_release, __tsan_memory_order_relaxed);
|
||
|
|
return cmp;
|
||
|
|
}
|
||
|
|
|
||
|
|
inline void MemoryBarrier() {
|
||
|
|
__tsan_atomic_thread_fence(__tsan_memory_order_seq_cst);
|
||
|
|
}
|
||
|
|
|
||
|
|
} // namespace base::subtle
|
||
|
|
} // namespace base
|
||
|
|
|
||
|
|
#undef ATOMICOPS_COMPILER_BARRIER
|
||
|
|
|
||
|
|
#endif // BASE_ATOMICOPS_INTERNALS_TSAN_H_
|