94 lines
2.4 KiB
C++
94 lines
2.4 KiB
C++
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// Copyright (c) 2012 The Chromium Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style license that can be
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// found in the LICENSE file.
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#include "base/cpu.h"
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#include "build/build_config.h"
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#include "testing/gtest/include/gtest/gtest.h"
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// Tests whether we can run extended instructions represented by the CPU
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// information. This test actually executes some extended instructions (such as
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// MMX, SSE, etc.) supported by the CPU and sees we can run them without
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// "undefined instruction" exceptions. That is, this test succeeds when this
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// test finishes without a crash.
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TEST(CPU, RunExtendedInstructions) {
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#if defined(ARCH_CPU_X86_FAMILY)
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// Retrieve the CPU information.
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base::CPU cpu;
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// TODO(jschuh): crbug.com/168866 Find a way to enable this on Win64.
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#if defined(OS_WIN) && !defined(_M_X64)
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ASSERT_TRUE(cpu.has_mmx());
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// Execute an MMX instruction.
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__asm emms;
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if (cpu.has_sse()) {
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// Execute an SSE instruction.
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__asm xorps xmm0, xmm0;
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}
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if (cpu.has_sse2()) {
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// Execute an SSE 2 instruction.
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__asm psrldq xmm0, 0;
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}
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if (cpu.has_sse3()) {
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// Execute an SSE 3 instruction.
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__asm addsubpd xmm0, xmm0;
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}
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if (cpu.has_ssse3()) {
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// Execute a Supplimental SSE 3 instruction.
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__asm psignb xmm0, xmm0;
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}
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if (cpu.has_sse41()) {
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// Execute an SSE 4.1 instruction.
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__asm pmuldq xmm0, xmm0;
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}
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if (cpu.has_sse42()) {
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// Execute an SSE 4.2 instruction.
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__asm crc32 eax, eax;
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}
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#elif defined(OS_POSIX) && defined(__x86_64__)
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ASSERT_TRUE(cpu.has_mmx());
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// Execute an MMX instruction.
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__asm__ __volatile__("emms\n" : : : "mm0");
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if (cpu.has_sse()) {
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// Execute an SSE instruction.
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__asm__ __volatile__("xorps %%xmm0, %%xmm0\n" : : : "xmm0");
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}
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if (cpu.has_sse2()) {
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// Execute an SSE 2 instruction.
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__asm__ __volatile__("psrldq $0, %%xmm0\n" : : : "xmm0");
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}
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if (cpu.has_sse3()) {
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// Execute an SSE 3 instruction.
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__asm__ __volatile__("addsubpd %%xmm0, %%xmm0\n" : : : "xmm0");
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}
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if (cpu.has_ssse3()) {
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// Execute a Supplimental SSE 3 instruction.
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__asm__ __volatile__("psignb %%xmm0, %%xmm0\n" : : : "xmm0");
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}
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if (cpu.has_sse41()) {
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// Execute an SSE 4.1 instruction.
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__asm__ __volatile__("pmuldq %%xmm0, %%xmm0\n" : : : "xmm0");
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}
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if (cpu.has_sse42()) {
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// Execute an SSE 4.2 instruction.
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__asm__ __volatile__("crc32 %%eax, %%eax\n" : : : "eax");
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}
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#endif
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#endif
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}
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